Understanding Multi-core Concurrency

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• Scott Owens, University of Cambridge
• Friday 21 October 2011, 16:00-17:00
• UG06 Learning Centre.

If you have a question about this talk, please contact Paul Levy.

Exploiting the multiprocessors that have recently become ubiquitous requires high-performance and reliable concurrent systems code, for concurrent data structures, operating system kernels, synchronisation libraries, compilers, and so on. However, concurrent programming, which is always challenging, is made much more so by two problems. First, real multiprocessors typically do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have relaxed memory models, varying in subtle ways between processor families, in which different hardware threads may have only loosely consistent views of a shared memory. Second, the public vendor architectures, supposedly specifying what programmers can rely on, are often in ambiguous informal prose (a particularly poor medium for loose specifications), leading to widespread confusion.

In this talk, I will briefly address the concurrency models of the x86 processor and the C++ programming language and explain how approaching them with rigorous mathematics has helped us build practical tools, improve their specifications, and engage with industry.

This talk is part of the Theoretical computer science seminar series.

This talk is included in these lists:

• Computer Science Departmental Series
• Computer Science Distinguished Seminars
• Theoretical computer science seminar
• UG06 Learning Centre
• computer sience

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