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True Concurrency?Add to your list(s) Download to your calendar using vCal
If you have a question about this talk, please contact Paul Levy. Multiprocessors and high-level concurrent languages generally provide only relaxed (non-sequentially-consistent) memory models, to permit performance optimisations. One has to understand these models to program reliable concurrent systems but, despite work in this area over many years, the specifications of real-world multiprocessors and languages are typically ambiguous and incomplete informal-prose documents, cannot be used for testing hardware or software, sometimes give guarantees that are too weak to be useful, and are sometimes simply unsound. This talk will review various problems with some current specifications, for x86 (Intel 64/IA32 and AMD64 ), and Power and ARM processors, and for the Java and C++ languages, and describe ongoing work to produce rigorously defined specifications for some of these. link: http://www.cl.cam.ac.uk/~pes20/weakmemory/ This is based on work with Mark Batty, Anthony Fox, Magnus Myreen, Scott Owens, Susmit Sarkar, and Tom Ridge, of the University of Cambridge; Jade Alglave, Luc Maranget, and Francesco Zappa Nardelli, of INRIA ; and by Jaroslav Sevcik, of the University of Edinburgh. This talk is part of the Theoretical computer science seminar series. This talk is included in these lists:
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